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ICM7555, ICM7556
November 1996
General Purpose Timers
Description
The ICM7555 and ICM7556 are CMOS RC timers providing significantly improved performance over the standard SE/NE555/6 and 355 timers, while at the same time being direct replacements for those devices in most applications. Improved parameters include low supply current, wide operating supply voltage range, low THRESHOLD, TRIGGER and RESET currents, no crowbarring of the supply current during output transitions, higher frequency performance and no requirement to decouple CONTROL VOLTAGE for stable operation. Specifically, the ICM7555 and ICM7556 are stable controllers capable of producing accurate time delays or frequencies. The ICM7556 is a dual ICM7555, with the two timers operating independently of each other, sharing only V+ and GND. In the one shot mode, the pulse width of each circuit is precisely controlled by one external resistor and capacitor. For astable operation as an oscillator, the free running frequency and the duty cycle are both accurately controlled by two external resistors and one capacitor. Unlike the regular bipolar 555/6 devices, the CONTROL VOLTAGE terminal need not be decoupled with a capacitor. The circuits are triggered and reset on falling (negative) waveforms, and the output inverter can source or sink currents large enough to drive TTL loads, or provide minimal offsets to drive CMOS loads.
Features
* Exact Equivalent in Most Cases for SE/NE555/556 or TLC555/556 * Low Supply Current - ICM7555. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 60A - ICM7556. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 120A * Extremely Low Input Currents . . . . . . . . . . . . . . . 20pA * High Speed Operation . . . . . . . . . . . . . . . . . . . . . . 1MHz * Guaranteed Supply Voltage Range . . . . . . . 2V to 18V * Temperature Stability . . . . . . . . . . . . 0.005%/oC at 25oC * Normal Reset Function - No Crowbarring of Supply During Output Transition * Can be Used with Higher Impedance Timing Elements than Regular 555/6 for Longer RC Time Constants * Timing from Microseconds through Hours * Operates in Both Astable and Monostable Modes * Adjustable Duty Cycle * High Output Source/Sink Driver can Drive TTL/CMOS * Outputs have Very Low Offsets, HI and LO
Ordering Information
PART NUMBER (BRAND) ICM7555CBA (7555CBA) ICM7555IBA (7555IBA) ICM7555IPA ICM7555ITV ICM7555MTV (Note) ICM7556IPD ICM7556MJD (Note) TEMP. RANGE (oC) 0 to 70 -25 to 85 -25 to 85 -25 to 85 -55 to 125 -25 to 85 -55 to 125 PACKAGE 8 Ld SOIC 8 Ld SOIC 8 Ld PDIP PKG. NO. M18.5 M18.5 E8.3
Applications
* Precision Timing * Pulse Generation * Sequential Timing * Time Delay Generation * Pulse Width Modulation * Pulse Position Modulation * Missing Pulse Detector
8 Pin Metal Can T8.C 8 Pin Metal Can T8.C 14 Ld PDIP E14.3 14 Ld CERDIP F14.3
NOTE: Add /883B to part number if 883B processing is desired.
Pinouts
ICM7555 (PDIP, SOIC) TOP VIEW ICM7555 (METAL CAN) TOP VIEW
VDD AND CASE 8 GND 1 TRIGGER 2 OUTPUT 3 RESET 4 8 VDD 7 DISCHARGE TRIGGER 2 6 THRESHOLD 5 CONTROL VOLTAGE OUTPUT 3 4 RESET 5 CONTROL VOLTAGE OUTPUT 5 TRIGGER 6 GND 7 6 THRESHOLD GND 1 7 DISCHARGE
ICM7556 (PDIP, CERDIP) TOP VIEW
DISCHARGE 1 THRESH- 2 OLD CONTROL 3 VOLTAGE RESET 4 14 VDD 13 DISCHARGE 12 THRESHOLD 11 CONTROL VOLTAGE 10 RESET 9 OUTPUT 8 TRIGGER
CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures. 1-888-INTERSIL or 321-724-7143 | Copyright (c) Intersil Corporation 1999
File Number
2867.2
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ICM7555, ICM7556
Absolute Maximum Ratings
Supply Voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . +18V Input Voltage Trigger, Control Voltage, Threshold, Reset (Note 1). . . . . . . . . . . . . . . . . . . . . .V+ +0.3V to GND -0.3V Output Current . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 100mA
Thermal Information
Thermal Resistance (Typical, Note 2) JA (oC/W) JC (oC/W) CERDIP Package . . . . . . . . . . . . . . . . 80 24 Metal Can Package . . . . . . . . . . . . . . . 165 80 14 Lead PDIP Package . . . . . . . . . . . . 115 N/A 8 Lead PDIP Package . . . . . . . . . . . . . 110 N/A SOIC Package . . . . . . . . . . . . . . . . . . . 170 N/A Maximum Junction Temperature (Hermetic Package) . . . . . . . . 175oC Maximum Junction Temperature (Plastic Package) . . . . . . . . 150oC Maximum Storage Temperature Range . . . . . . . . . -65oC to 150oC Maximum Lead Temperature (Soldering 10s) . . . . . . . . . . . . 300oC (SOIC - Lead Tips Only)
Operating Conditions
Temperature Range ICM7555C. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 0oC to 70oC ICM7555I, ICM7556I. . . . . . . . . . . . . . . . . . . . . . . -25oC to 85oC ICM7555M, ICM7556M. . . . . . . . . . . . . . . . . . . . -55oC to 125oC
CAUTION: Stresses above those listed in "Absolute Maximum Ratings" may cause permanent damage to the device. This is a stress only rating and operation of the device at these or any other conditions above those indicated in the operational sections of this specification is not implied.
NOTES: 1. Due to the SCR structure inherent in the CMOS process used to fabricate these devices, connecting any terminal to a voltage greater than V+ +0.3V or less than V- -0.3V may cause destructive latchup. For this reason it is recommended that no inputs from external sources not operating from the same power supply be applied to the device before its power supply is established. In multiple supply systems, the supply of the ICM7555/6 must be turned on first. 2. JA is measured with the component mounted on an evaluation PC board in free air.
Electrical Specifications
Applies to ICM7555 and ICM7556, Unless Otherwise Specified TA = 25oC (NOTE 4) -55oC TO 125oC MIN 858 1717 61 27 61 0.2 TYP 150 200 250 0.5 150 200 250 0.5 MAX 300 300 600 600 1161 2323 72 37 50 50 72 1.2 50 UNITS A A A A % s ppm/oC ppm/oC ppm/oC %/V % s ppm/oC ppm/oC ppm/oC %/V % VDD % VDD nA nA % VDD V nA
PARAMETER Static Supply Current
SYMBOL IDD
TEST CONDITIONS ICM7555 VDD = 5V VDD = 15V ICM7556 VDD = 5V VDD = 15V
MIN -
TYP 40 60 80 120 2 0.5 2 0.5 67 32 67 -
MAX 200 300 400 600 71 36 10 10 71 1.0 10
Monostable Timing Accuracy
RA = 10K, C = 0.1F, VDD = 5V
Drift with Temperature (Note 3)
VDD = 5V VDD = 10V VDD = 15V
-
Drift with Supply (Note 3) Astable Timing Accuracy
VDD = 5V to 15V RA = RB = 10K, C = 0.1F, VDD = 5V
Drift with Temperature (Note 3)
VDD = 5V VDD = 10V VDD = 15V
62 28 62 0.4 -
Drift with Supply (Note 3) Threshold Voltage Trigger Voltage Trigger Current Threshold Current Control Voltage Reset Voltage Reset Current VTH VTRIG ITRIG ITH VCV VRST IRST
VDD = 5V to 15V VDD = 15V VDD = 15V VDD = 15V VDD = 15V VDD = 15V VDD = 2V to 15V VDD = 15V
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ICM7555, ICM7556
Electrical Specifications
Applies to ICM7555 and ICM7556, Unless Otherwise Specified TA = 25oC PARAMETER Discharge Leakage Output Voltage SYMBOL IDIS VOL TEST CONDITIONS VDD = 15V VDD = 15V, ISINK = 20mA VDD = 5V, ISINK = 3.2mA VOH VDD = 15V, ISOURCE = 0.8mA VDD = 5V, ISOURCE = 0.8mA Discharge Output Voltage VDIS VDD = 5V, ISINK = 15mA VDD = 15V, ISINK = 15mA Supply Voltage (Note 3) Output Rise Time (Note 3) Output Fall Time (Note 3) Oscillator Frequency (Note 3) VDD tR tF fMAX Functional Operation RL = 10M, CL = 10pF, VDD = 5V RL = 10M, CL = 10pF, VDD = 5V VDD = 5V, RA = 470, RB = 270, C = 200pF MIN 14.3 4.0 2.0 TYP 0.4 0.2 14.6 4.3 0.2 75 75 1 MAX 10 1.0 0.4 0.4 18.0 (NOTE 4) -55oC TO 125oC MIN 14.2 3.8 3.0 TYP MAX 50 1.25 0.5 0.6 0.4 16.0 UNITS nA V V V V V V V ns ns MHz
NOTES: 3. These parameters are based upon characterization data and are not tested. 4. Applies only to military temperature range product (M suffix).
Functional Diagram
VDD 8 R THRESHOLD 6 5 CONTROL VOLTAGE R + TRIGGER 2 R 1 COMPARATOR A + 4 FLIP-FLOP RESET
OUTPUT DRIVERS
OUTPUT
7 n
3 DISCHARGE
COMPARATOR B 1 GND
NOTE: This functional diagram reduces the circuitry down to its simplest equivalent components. Tie down unused inputs. R = 100k, 20% (Typ)
TRUTH TABLE THRESHOLD VOLTAGE Don't Care >2/3(V+) <2/3(V+) Don't Care TRIGGER VOLTAGE Don't Care >1/3(V+) >1/3(V+) <1/3(V+) RESET Low High High High OUTPUT Low Low Stable High DISCHARGE SWITCH On On Stable Off
NOTE: RESET will dominate all other inputs: TRIGGER will dominate over THRESHOLD.
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ICM7555, ICM7556 Schematic Diagram
VDD P P R P P
THRESHOLD N CONTROL VOLTAGE N R OUTPUT P TRIGGER P NPN
R N N N N N N N GND
RESET R = 100k 20% (TYP)
DISCHARGE
Application Information
General
SUPPLY CURRENT (mA) 500 TA = 25oC 400
The ICM7555/6 devices are, in most instances, direct replacements for the NE/SE 555/6 devices. However, it is possible to effect economies in the external component count using the ICM7555/6. Because the bipolar 555/6 devices produce large crowbar currents in the output driver, it is necessary to decouple the power supply lines with a good capacitor close to the device. The 7555/6 devices produce no such transients. See Figure 1. The ICM7555/6 produces supply current spikes of only 2mA - 3mA instead of 300mA - 400mA and supply decoupling is normally not necessary. Also, in most instances, the CONTROL VOLTAGE decoupling capacitors are not required since the input impedance of the CMOS comparators on chip are very high. Thus, for many applications 2 capacitors can be saved using an ICM7555, and 3 capacitors with an ICM7556.
300 SE/NE555 200
100 0 ICM7555/56 0 200 400 TIME (ns) 600 800
FIGURE 1. SUPPLY CURRENT TRANSIENT COMPARED WITH A STANDARD BIPOLAR 555 DURING AN OUTPUT TRANSITION
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ICM7555, ICM7556
Power Supply Considerations Although the supply current consumed by the ICM7555/6 devices is very low, the total system supply current can be high unless the timing components are high impedance. Therefore, use high values for R and low values for C in Figures 2 and 3. Output Drive Capability The output driver consists of a CMOS inverter capable of driving most logic families including CMOS and TTL. As such, if driving CMOS, the output swing at all supply voltages will equal the supply voltage. At a supply voltage of 4.5V or more the ICM7555/6 will drive at least 2 standard TTL loads. Astable Operation The circuit can be connected to trigger itself and free run as a multivibrator, see Figure 2A. The output swings from rail to rail, and is a true 50% duty cycle square wave. (Trip points and output swings are symmetrical). Less than a 1% frequency variation is observed, over a voltage range of +5V to +15V.
1 f = ----------------1.4 RC
Monostable Operation In this mode of operation, the timer functions as a one-shot, see Figure 3. Initially the external capacitor (C) is held discharged by a transistor inside the timer. Upon application of a negative TRIGGER pulse to pin 2, the internal flip-flop is set which releases the short circuit across the external capacitor and drives the OUTPUT high. The voltage across the capacitor now increases exponentially with a time constant t = RAC. When the voltage across the capacitor equals 2/ V+, the comparator resets the flip-flop, which in turn dis3 charges the capacitor rapidly and also drives the OUTPUT to its low state. TRIGGER must return to a high state before the OUTPUT can return to a low state.
tOUTPUT = -ln
(1/3) RAC = 1.1RAC
1 8 7 ICM7555 6 5 OPTIONAL CAPACITOR
VDD RA DISCHARGE THRESHOLD CONTROL VOLTAGE C
TRIGGER OUTPUT RESET
2 3 4
The timer can also be connected as shown in Figure 2B. In this circuit, the frequency is:
f = 1.44 ( R A + 2R B ) C
VDD 18V
FIGURE 3. MONOSTABLE OPERATION
Control Voltage The CONTROL VOLTAGE terminal permits the two trip voltages for the THRESHOLD and TRIGGER internal comparators to be controlled. This provides the possibility of oscillation frequency modulation in the astable mode or even inhibition of oscillation, depending on the applied voltage. In the monostable mode, delay times can be changed by varying the applied voltage to the CONTROL VOLTAGE pin. RESET The RESET terminal is designed to have essentially the same trip voltage as the standard bipolar 555/6, i.e., 0.6V to 0.7V. At all supply voltages it represents an extremely high input impedance. The mode of operation of the RESET function is, however, much improved over the standard bipolar 555/6 in that it controls only the internal flip-flop, which in turn controls simultaneously the state of the OUTPUT and DISCHARGE pins. This avoids the multiple threshold problems sometimes encountered with slow falling edges in the bipolar devices.
The duty cycle is controlled by the values of RA and RB, by the equation:
D = ( R A + R B ) ( R A + 2R B )
VDD GND TRIGGER 2 OUTPUT VDD RESET R C 3 4 6 5 7 VDD 1 8 DISCHARGE THRESHOLD 10K ALTERNATE OUTPUT
CONTROL VOLTAGE OPTIONAL CAPACITOR
FIGURE 2A. ASTABLE OPERATION
VDD 1 2 OUTPUT VDD 3 4 8 7 6 5 RB RA
C
OPTIONAL CAPACITOR
FIGURE 2B. ALTERNATE ASTABLE CONFIGURATION
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ICM7555, ICM7556 Typical Performance Curves
1200 SUPPLY CURRENT (ICM7555) (A) 1100 MINIMUM PULSE WIDTH (ns) 1000 900 800 700 600 500 400 300 200 100 0 0 10 20 30 40 LOWEST VOLTAGE LEVEL OF TRIGGER PULSE (%VDD) VDD = 5V VDD = 18V VDD = 2V TA = 25oC 200 180 160 140 120 100 80 60 40 20 0 0 2 4 6 8 10 12 14 16 18 20 SUPPLY VOLTAGE (V) TA = 70oC TA = -20oC TA = 25oC 400 SUPPLY CURRENT (ICM7556) (A) 10.0 10.0 360 320 280 240 200 160 120 80 40 0
FIGURE 4. MINIMUM PULSE WIDTH REQUIRED FOR TRIGGERING
FIGURE 5. SUPPLY CURRENT vs SUPPLY VOLTAGE
-0.1 OUTPUT SOURCE CURRENT (mA) TA = 25oC OUTPUT SINK CURRENT (mA)
100 TA = -20oC
VDD = 2V -1.0 VDD = 5V
10.0
VDD = 18V
VDD = 5V
VDD = 2V 1.0
-10.0 VDD = 18V
-100 -10
-1.0 -0.1 OUTPUT VOLTAGE REFERENCED TO VDD (V)
-0.01
0.1 0.01
0.1
1.0
OUTPUT LOW VOLTAGE (V)
FIGURE 6. OUTPUT SOURCE CURRENT vs OUTPUT VOLTAGE
FIGURE 7. OUTPUT SINK CURRENT vs OUTPUT VOLTAGE
100 TA = 25oC OUTPUT SINK CURRENT (mA) VDD = 18V 10.0 VDD = 5V OUTPUT SINK CURRENT (mA)
100 TA =70oC
VDD = 18V 10.0 VDD = 5V
VDD = 2V 1.0
VDD = 2V 1.0
0.1 0.01
0.1 1.0 OUTPUT LOW VOLTAGE (V)
10.0
0.1 0.01
0.1
1.0
OUTPUT LOW VOLTAGE (V)
FIGURE 8. OUTPUT SINK CURRENT vs OUTPUT VOLTAGE
FIGURE 9. OUTPUT SINK CURRENT vs OUTPUT VOLTAGE
8-175
ICM7555, ICM7556 Typical Performance Curves
NORMALIZED FREQUENCY DEVIATION (%) 8 6 4 2 0 2 4 6 8 0.1 1.0 10.0 100.0 RA = RB = 10M C = 100pF DISCHARGE SINK CURRENT (mA) TA = 25oC
(Continued)
100 TA = 25oC VDD = 18V 10.0 VDD = 2V VDD = 5V
RA = RB = 10k C = 0.1F
1.0
0.1 0.01
SUPPLY VOLTAGE (V)
0.1 1.0 DISCHARGE LOW VOLTAGE (V)
10.0
FIGURE 10. NORMALIZED FREQUENCY STABILITY IN THE ASTABLE MODE vs SUPPLY VOLTAGE
600 VDD = 5V PROPAGATION DELAY (ns) 500
FIGURE 11. DISCHARGE OUTPUT CURRENT vs DISCHARGE OUTPUT VOLTAGE
NORMALIZED FREQUENCY DEVIATION (%)
+1.0 +0.9 +0.8 +0.7 +0.6 +0.5 +0.4 +0.3 +0.2 +0.1 0 -0.1 -20 0 20 40 60 80 TEMPERATURE (oC) VDD = 2V VDD = 18V VDD = 5V RA = RB = 10k C = 0.1F
400 300 200 100 0 0 10 20 30 40 LOWEST VOLTAGE LEVEL OF TRIGGER PULSE (%VDD) TA = 70oC TA = 25oC TA = -20oC
FIGURE 12. PROPAGATION DELAY vs VOLTAGE LEVEL OF TRIGGER PULSE
FIGURE 13. NORMALIZED FREQUENCY STABILITY IN THE ASTABLE MODE vs TEMPERATURE
1.0 100m 10m CAPACITANCE (F) CAPACITANCE (F) 1m 100 10 1 100n 10n 1n 100p 10p 1p 0.1 (RA + 2RB) 1k 10k 100k 1M 10M 100M TA = 25oC
1.0 100m 10m 1m 100 10 1 100n 10n 1n 100p 10p 1 10 100 1K 10K 100K 1M 10M 1p 100n 1 10 100 1m 10m 100m 1 10 1k 10k 100k 1M 10M 100M TA = 25oC RA
FREQUENCY (Hz)
TIME DELAY (s)
FIGURE 14. FREE RUNNING FREQUENCY vs RA, RB AND C
FIGURE 15. TIME DELAY IN THE MONOSTABLE MODE vs RA AND C
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ICM7555, ICM7556
All Intersil semiconductor products are manufactured, assembled and tested under ISO9000 quality systems certification.
Intersil products are sold by description only. Intersil Corporation reserves the right to make changes in circuit design and/or specifications at any time without notice. Accordingly, the reader is cautioned to verify that data sheets are current before placing orders. Information furnished by Intersil is believed to be accurate and reliable. However, no responsibility is assumed by Intersil or its subsidiaries for its use; nor for any infringements of patents or other rights of third parties which may result from its use. No license is granted by implication or otherwise under any patent or patent rights of Intersil or its subsidiaries. For information regarding Intersil Corporation and its products, see web site http://www.intersil.com
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